Field of the Invention
The present invention relates to the field of displays, and in particular to a multi-phase clock generating circuit and liquid crystal display panel.
Description of the Related Art
LCD TVs are widely used due to characteristics such as small size, low weight, low power consumption, and high resolution.
An LCD panel drive circuit generally includes a timing control chip, a line scan drive chip, etc. The line scan drive chip is located at the side of LCD panel to achieve the purpose of saving resources, but in order to achieve a better visual effect, the line scan drive chip is often required to provide multi-channel clock signals, and there is a certain phase difference between the clock signals.
FIG. 1 illustrates a connection diagram of a conventional timing controller chip and a multi-phase clock generating circuit connection diagram. Since a timing controller chip 10 is inputted with multi-channel clock signals CLK1-CLKn to a multiple phase clock generating circuit 11, the multi-phase clock generating circuit 11 then outputs multi-channel clock signals CLK1-CLKn to a line scan drive chip 12. Because of the need for outputting multi-channel clock signals, the number of pins of the timing controller chip 10 and the line scan drive chip 12 is increased, while the cost of the drive circuit is increased as well.
Therefore, there is a need for a multi-phase clock generating circuit and liquid crystal display panel to solve the problems of the prior art.